grtos_regs.h

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/******************************************************************************
*                                                                             *
* License Agreement                                                           *
* Copyright (c) Ricardo L. Cayssials                                          *
* All rights reserved.                                                        *
*                                                                             *
******************************************************************************/
 
 
#ifndef __GRTOS_REGS_H__
#define __GRTOS_REGS_H__
 
#include <io.h>
// extern void *GRTOS_DRIVER_GRTOS_BASE;
 
#define ADDR_SMP                0
#define ADDR_TM_CNT_HGH         1
 
#define ADDR_NXT_OCC_TM_HGH     3
#define ADDR_SYS_MUTEX_TIME_HGH 4
#define ADDR_SYS_TM             5
#define ADDR_MTX_GRN            6
#define ADDR_MTX_RLS            7
 
#define ADDR_MTX_RSV_SET        9
#define ADDR_MTX_RSV_CLR        10
#define ADDR_INT_PRC_PND_CLR    11
#define ADDR_ELP_TM_CNT         12
#define ADDR_MTX_SET_TM         13
#define ADDR_FRZ_TM_HGH         14
#define ADDR_TM_PSC             15
#define ADDR_FRZ_THR_HGH        16
#define ADDR_CTRL               17
#define ADDR_EVN_OCC            19
#define ADDR_MUTEXBLOCKED32     20
#define ADDR_INT_ENB_SET        21
#define ADD_INT_ENB_CLR         22
#define ADDR_LOW_PRC_SET        23
#define ADDR_NXT_TM_PRC_SET     24
 
#define ADDR_HLT_IDL_PRC_ENB    25
#define ADDR_HLT_IDL_PRC_DSB    26
 
#define ADDR_IRQ_ENB_SET        27
#define ADDR_IRQ_ENB_CLR        28
#define ADDR_IRQ_RQS            29
#define ADDR_RST_CLR            30
#define ADDR_TRG_INT_PRC        31
 
#define ADDR_HLT_ACT_CNT_SMP    34
 
// Macros defined and implemented in hardware, but not used
#define IORD_GRTOS_HLT_ACT_CNT_SMP               IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_HLT_ACT_CNT_SMP)
#define IORD_GRTOS_TRG_INT_PRC                   IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_TRG_INT_PRC)
#define IORD_GRTOS_HLT_IDL_PRC_ENB               IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_HLT_IDL_PRC_ENB)
#define IORD_GRTOS_RST_CLR                       IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_RST_CLR)
#define IORD_GRTOS_FRZ_TM_HGH                    IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_FRZ_TM_HGH)
 
#define IOWR_GRTOS_HLT_IDL_PRC_CLR(data)         IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_HLT_IDL_PRC_DSB, data)
#define IOWR_GRTOS_FRZ_TM_HGH(data)              IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_FRZ_TM_HGH,data)
#define IOWR_GRTOS_MTX_RSV_CLR(data)             IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_MTX_RSV_CLR, data)
#define IOWR_GRTOS_MTX_RQS(data)                 IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_MTX_GRN, data)
 
 
// Read grtos registers
// #define IORD_GRTOS_SMP                           IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_SMP)
// #define IORD_GRTOS_TM_CNT_HGH                    IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_TM_CNT_HGH)
// #define IORD_GRTOS_SYS_MUTEX_TIME_HGH            IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_SYS_MUTEX_TIME_HGH)
// #define IORD_GRTOS_SYS_TM_HGH                    IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_SYS_TM)
 
 
 
#define GRTOS_now ({ \
TIMEPRIORITY value64; \
do { \
    value64.i32[1] = (unsigned) IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_TM_CNT_HGH); \
    value64.i32[0] = (unsigned) IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_SMP); \
} while(0); \
    value64.i64; \
})
 
 
#define GRTOS_CMD_MTX_TM_GET ({ \
TIMEPRIORITY value64; \
do { \
    value64.i32[1] = (unsigned) IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_SYS_MUTEX_TIME_HGH); \
    value64.i32[0] = (unsigned) IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_SMP); \
} while(0); \
    value64.i64; \
})
 
#define GRTOS_CMD_SYS_TM_GET ({ \
TIMEPRIORITY value64; \
do { \
    value64.i32[1] = (unsigned) IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_SYS_TM); \
    value64.i32[0] = (unsigned) IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_SMP); \
} while(0); \
    value64.i64; \
})
 
 
#define GRTOS_MTX_PRC_GRANTED                    IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_MTX_GRN)
 
#define GRTOS_GET_INTERVAL                       IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_ELP_TM_CNT)
 
#define GRTOS_CMD_GET_TIME_PRESCALE                          IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_TM_PSC)
 
#define GRTOS_CMD_FRZ_TM_THR_GET ({ \
    TIMEPRIORITY value64; \
    value64.i32[1] = (unsigned) IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_FRZ_THR_HGH); \
    value64.i32[0] = (unsigned) IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_SMP); \
    value64.i64; \
})
 
#define GRTOS_CMD_GET_STATUS_DEBUG_HOLD (((IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_CTRL) >> 2) & 1) ? G_TRUE : G_FALSE)
 
#define GRTOS_CMD_GET_FRZ_ENB (((IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_CTRL) >> 1) & 1) ? G_TRUE : G_FALSE)
 
#define GRTOS_CMD_GET_FRZ_ACT ((IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_CTRL)  & 1) ? G_TRUE : G_FALSE)
 
#define GRTOS_CMD_EVN_OCC                                    IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_EVN_OCC)
 
#define GRTOS_MUTEX_BLOCKED_GET                              IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_MUTEXBLOCKED32)
 
#define GRTOS_CMD_IRQ_RQS                                    IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_IRQ_RQS)
 
#define GRTOS_CMD_IRQ_ENB_GET(irq) ((IORD(GRTOS_DRIVER_GRTOS_BASE, ADDR_INT_ENB_SET) >> (irq-1)) & 1)
 
 
// Write grtos registers
 
#define GRTOS_CMD_FRZ_TM_THR_SET(timeset) \
    do { \
        TIMEPRIORITY temp_aux; \
        temp_aux.i64 = (INT64) timeset; \
        IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_SMP, (unsigned long)temp_aux.i32[0]); \
        IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_FRZ_THR_HGH, (unsigned long)temp_aux.i32[1]); \
    }while(0) 
 
#define GRTOS_CMD_NXT_OCC_TM_EVN_SET(timeset) \
    do { \
        TIMEPRIORITY temp_aux; \
        temp_aux.i64 = (INT64) timeset; \
        IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_SMP, (unsigned long)temp_aux.i32[0]); \
        IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_NXT_OCC_TM_HGH, (unsigned long)temp_aux.i32[1]); \
    }while(0) 
 
#define GRTOS_MTX_RLS                                        IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_MTX_RLS, GRTOS_CMD_PRC_ID)
 
#define GRTOS_MTX_RSV_SET                                    IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_MTX_RSV_SET, GRTOS_CMD_PRC_ID)
 
#define GRTOS_CMD_INT_PRC_PND_CLR                            IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_INT_PRC_PND_CLR, GRTOS_CMD_PRC_ID);
 
#define GRTOS_CMD_SET_TIME_PRESCALE(scale)                   IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_TM_PSC, scale);
 
#define GRTOS_CMD_FRZ_ENB_SET                                IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_CTRL, 1)
 
#define GRTOS_CMD_FRZ_DSB_SET                                IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_CTRL, 2)
 
#define GRTOS_CMD_FRZ_EVN_CLR                                IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_CTRL, 3) 
 
#define GRTOS_CMD_TM_CNT_CLR                                 IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_CTRL, 4); 
 
#define GRTOS_CMD_DEBUG_HOLD_ENB                             IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_CTRL, 6)
 
#define GRTOS_CMD_DEBUG_HOLD_DIS                             IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_CTRL, 7)
 
#define GRTOS_CMD_PRC_INT_ENB                                IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_INT_ENB_SET, GRTOS_CMD_PRC_ID);
 
#define GRTOS_CMD_PRC_INT_DSB                                IOWR(GRTOS_DRIVER_GRTOS_BASE, ADD_INT_ENB_CLR, GRTOS_CMD_PRC_ID);
 
#define GRTOS_CMD_LOW_PRC_SET(processor)                     IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_LOW_PRC_SET, processor);
 
#define GRTOS_CMD_NXT_TM_PRC_SET(processor)                  IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_NXT_TM_PRC_SET, processor);
 
#define GRTOS_MUTEX_BLOCKED(data)                            IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_MUTEXBLOCKED32, data)
    
#define GRTOS_CMD_HLT_IDL_PRC                                IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_HLT_IDL_PRC_ENB, GRTOS_CMD_PRC_ID)
 
#define GRTOS_CMD_IRQ_ENB_SET(irq)                           IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_IRQ_ENB_SET, irq)
 
#define GRTOS_CMD_IRQ_ENB_CLR(irq)                           IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_IRQ_ENB_CLR, irq)
 
#define GRTOS_CMD_TRG_PRC_INT_SET(proc)                      IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_TRG_INT_PRC, proc);
 
#define GRTOS_CMD_RST_GRTOS                                  IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_RST_CLR, 0)
 
#define GRTOS_CMD_RLS_NXT_PRC                                IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_RST_CLR, GRTOS_CMD_PRC_ID)
 
#define GRTOS_USER_CRITICAL_SECTION_SET_RELEASE_TIME(time)   IOWR(GRTOS_DRIVER_GRTOS_BASE, ADDR_MTX_SET_TM, time);
 
 
/************************************************************************************
 *  GRTOS COMMANDS
 ************************************************************************************/
 
#define GRTOS_CMD_PRC_ID  __builtin_rdctl(5)
 
 
#define GRTOS_CMD_PRC_INT(proc) \
    GRTOS_CMD_TRG_PRC_INT_SET(proc); \
    while (GRTOS_CMD_IRQ_ENB_GET(proc)){ \
        while(0); \
    }
 
 
#define GRTOS_CMD_HALT_PROCESSOR \
        GRTOS_CMD_HLT_IDL_PRC; \
        g_kcb.G_PCBTbl[GRTOS_CMD_PRC_ID -1].GRTOS_PROCESSOR_BASE[0] = (int) 0;
 
/************************************************************************************
 *  GRTOS CRITICAL SECTION COMMANDS
 ************************************************************************************/
 
#define GRTOS_CMD_CRITICAL_SECTION_GET \
    do{ \
        do { \
            GRTOS_MTX_RSV_SET; \
            GRTOS_CMD_HALT_PROCESSOR \
        } while (GRTOS_CMD_PRC_ID != GRTOS_MTX_PRC_GRANTED);  \
    }while(0)
 
 
#define GRTOS_CMD_CRITICAL_SECTION_RELEASE \
    do{ GRTOS_CMD_PRC_INT_ENB; \
        alt_dcache_flush_all(); \
        GRTOS_MTX_RLS; \
    }while(0)
  
#define GRTOS_CMD_MTX_RQS_GET GRTOS_MTX_PRC_GRANTED;
 
#define GRTOS_USER_CRITICAL_SECTION_GET  GRTOS_CMD_CRITICAL_SECTION_GET
 
 
#define GRTOS_USER_CRITICAL_SECTION_RELEASE  GRTOS_CMD_CRITICAL_SECTION_RELEASE
 
 
 
 
 
 
 
 
#endif /* __GRTOS_REGS_H__ */