[August, 2025] – GeMRTOS, multiprocessor real-time operating systems (RTOS), announced that it has joined the Altera Solution Acceleration Partner (ASAP) program. This collaboration combines GeMRTOS’s expertise in multiprocessor system development with Altera’s FPGA technologies.
GeMRTOS stands out for its easy implementation of efficient multiprocessor systems targeting Nios V processors, with Nios II supported as a legacy route. It is delivered as an Altera Platform Designer component, so adding it to a system is the same operation as adding any other IP, and the number of processors is a parameter of the system rather than a property of the operating system. Its compatibility extends to the legacy Nios II/e/f processors, providing scalable, high-performance solutions for diverse applications. This flexibility allows developers to tailor systems to specific needs, leveraging the latest advancements in processor technology.
This partnership will deliver significant benefits to GeMRTOS users, including:
- Event-driven timing: GeMRTOS runs alongside a hardware controller synthesised into the FPGA, which routes interrupts and timed events to the processor that is cheapest to preempt. There is no periodic tick, and scheduling and event handling are not polled.
- Hybrid partition scheduling: Partitioned, global and exclusion-limited scheduling are expressed through one mechanism, per group of tasks, in the same application.
- Standard Altera flow: Integration uses Quartus® Prime and Platform Designer with no separate build system to adopt. Eleven worked examples are delivered on development boards and in a Windows simulation layer.
Through the Altera Solution Acceleration Partner program, GeMRTOS is available to engineering teams building multiprocessor systems on Altera FPGA devices, together with the design services to integrate it.
GeMRTOS supports Nios V as its current path, with Nios II maintained as a legacy route.
