Prior to downloading the memory code, nios2-download resets the CPU. When processor ID=1 asserts the debug reset signal prior to downloading the program code, the remaining processors are reset. The start of the remaining processors will be tainted if the reset code for those processors is not stored in memory beforehand (the remaining processors are not paused as processor ID=1 while code is downloaded).
Solution #
When the FPGA device is configured, boot code ought to be loaded into the boot memory. It is necessary to run the make mem_init_generate command, add the.qip file to the Quartus project files, and then perform a full hardware compilation.
Full reconfiguration can be avoided by following the procedure “Update Memory Contents Without Recompiling” detailed in https://www.intel.com/content/www/us/en/programmable/documentation/jeb1529967983176.html.
