The Platform Designer flow encompasses both hardware and software implementation. The Platform Designer tool is a part of the Quartus Prime suite, facilitating the creation of embedded systems tailored for Intel’s FPGA devices. This embedded system design is integrated into a hardware design, which is compiled through Quartus Prime. Subsequently, an essential Board Support Package (BSP) is produced using Intel tools to provide Hardware Abstraction Layer (HAL) support for the software application. The software application itself is compiled employing gcc tools. Finally, the FPGA configuration is executed using Quartus Programmer, preparing the FPGA for the download and execution of the software application.
The complete design flow is illustrated in the diagram:
The gemrtos_build.sh script is designed to streamline the execution of all the steps in the design flow.
